BESSPIN GPE

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Besspin-GFE notes

Intro info

  • You can follow here to install bluspec: https://gulmezmerve.github.io/posts/2024/03/bluspec-1/ (get just bin file)
  • Add to path e.g., export PATH="$PATH:/bsc-2023.07-debian-12.1/bin/ to ~/.bashrc and source it

  • The active development CHERI-Toooba core: https://github.com/CTSRD-CHERI/Toooba

Get BESSPIN GPE

  • git clone git@github.com:gulmezmerve/BESSPIN-GFE.git
  • Follow the https://github.com/gulmezmerve/BESSPIN-GFE?tab=readme-ov-file#update-dependencies

  • BESSPIN GPE: https://github.com/CTSRD-CHERI/BESSPIN-GFE has Toooba as a submodule https://github.com/CTSRD-CHERI/BESSPIN-GFE/tree/cambridge/bluespec-processors/P3. But it is not updated as a submodule. Please get the updated the version..

  • Small note: Info ‘bluespec_p3’ refers to Toooba core:

Compile the code

src_SSITH_P3/
make clean
make
make compile

Generate the bitstreams

cd $GFE_REPO
./setup_soc_project.sh bluespec_p3 
./build.sh bluespec_p3

Utily Report

~/BESSPIN-GFE/vivado/soc_bluespec_p3/soc_bluespec_p3.runs/impl_1/design_1_utilization_placed.rpt

Load the bitstreams to FPGA

- ./pytest_processor.py bluespec_p3

Load elf file to FPGA

Open GDB:

riscv64-unknown-elf-gdb -x bootmem/startup.gdb /home/merve/BESSPIN-GFE/mon_cheri_binaries_malloc/coremark_P2-riscv-bare-metal-CHERI\:0-MONCHERI-0LLVM.elf
oi

To OpenOCD

- openocd -f testing/targets/ssith_gfe.cfg

To run the simulator

cd BESSPIN-GFE/verilator_simulators/run 
cd ..
make simulator PROC=bluespec_p2
cd run
make run_example PROC=bluespec_p2 EXAMPLE=/home/merve/coremark_wbr.elf VERBOSITY=+v4

To get the output from terminal

socat stdin,raw,echo=0 /dev/ttyUSB2,raw,echo=0